<図書>

Correct hardware design and verification methods : 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003 : proceedings / Daniel Geist, Enrico Tronci (Eds.)

(Lecture notes in computer science;2860)

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配架場所 巻 次 請求記号 登録番号 状 態 文庫区分 刷 年 コメント
理7・CS図
39:L:1.2860 2310042995

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出版者 Berlin ; Tokyo : Springer
出版年 c2003
大きさ xii, 426 p. : ill. ; 24 cm
一般注記 Includes bibliographical references and index
著者標目 *Advanced Research Working Conference on Correct Hardware Design Methodologies (12th : 2003 : L'Aquila, Italy)
Geist, Daniel, 1961-
Tronci, Enrico, 1961-
件 名 LCSH:Integrated circuits -- Very large scale integration -- Computer-aided design -- Congresses
LCSH:Integrated circuits -- Verification -- Congresses
分 類 LCC:TK7874.75
DC22:621.39/5
本文言語 英語
書誌ID 2001777799
ISBN 354020363X
NCID BA6437643X WCLINK

類似資料

  1. 1 Correct hardware design and verification methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings / Paolo E. Camurati, Hans Eveking (eds.)
  2. 2 Correct hardware design and verification methods : 11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001, Livingston, Scotland, UK, September 4-7, 2001 : proceedings / Tiziana Margaria, Tom Melham (eds.)
  3. 3 Assertion-based design / Harry Foster, Adam Krolnik, David Lacey
  4. 4 Parallel algorithms for VLSI computer-aided design / Prithviraj Banerjee
  5. 5 VLSI chip design with the hardware description language VERILOG : an introduction based on a large RISC processor design / Ulrich Golze ... [et al.]
  6. 6 Correct hardware design and verification methods : 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999 : proceedings / Laurence Pierre, Thomas Kropf (eds.)
  7. 7 Algorithms and data structures in VLSI design : OBDD-foundations and applications / Christoph Meinel, Thorsten Theobald
  8. 8 Integrated circuit design : power and timing modeling, optimization and simulation : 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000 : proceedings / Dimitrios Soudris, Peter Pirsch, Erich Barke (eds.)
  9. 9 Integrated circuit design : power and timing modeling, optimization and simulation : 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002 : proceedings / Bertrand Hochet, Antonio J. Acosta, Manuel J. Bellido (eds.)
  10. 10 Timed Boolean functions : a unified formalism for exact timing analysis / William K.C. Lam, Robert K. Brayton

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